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STP16NB25 STP16NB25FP
N - CHANNEL 250V - 0.220 - 16A - TO-220/TO-220FP PowerMESHTM MOSFET
TYPE ST P16NB25 ST P16NB25FP
s s s s s
V DSS 250 V 250 V
R DS(on) < 0.28 < 0.28
ID 16 A 8A
TYPICAL RDS(on) = 0.220 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED
3 1 2
3 1 2
DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s UNINTERRUPTIBLE POWER SUPPLY (UPS) s DC-DC & DC-AC CONVERTERS FOR TELECOM, INDUSTRIAL AND CONSUMER ENVIRONMENT ABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS ID ID I DM (*) P tot dv/dt(1) V ISO Ts tg Tj March 1999 Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k) G ate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 o C Drain Current (pulsed) T otal Dissipation at Tc = 25 o C Derating Factor Peak Diode Recovery voltage slope Insulation W ithstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature
o
TO-220
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
Value STP16NB25 ST P16NB25F P 250 250 30 16 10 64 140 1.12 5.5 -----65 to 150 150
( 1) ISD 16A, di/dt 200 A/s, VDD V(BR)DSS, Tj TJMAX
Un it V V V 8 5 32 45 0.36 5.5 2000 A A A W W /o C V/ns V
o o
C C 1/9
(*) Pulse width limited by safe operating area
STP16NB25/FP
THERMAL DATA
TO-220 R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Max 0.9 62.5 0.5 300 T O220FP 2.77
o o o
C/W C/W C/W o C
Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose
AVALANCHE CHARACTERISTICS
Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) Max Value 16 250 Unit A mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 250 1 10 100 Typ. Max. Unit V A A nA
V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 30 V
T c = 125 oC
ON ()
Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10V Test Con ditions ID = 250 A ID = 8 A 16 Min. 3 Typ. 4 0.22 Max. 5 0.28 Unit V A
V DS > ID(o n) x R DS(on )ma x V GS = 10 V
DYNAMIC
Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz I D =8 A V GS = 0 Min. Typ. 4 1000 250 40 Max. Unit S pF pF pF
2/9
STP16NB25/FP
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 125 V ID = 8 A R G = 4.7 V GS = 10 V (Resistive Load, see fig. 3) V DD = 200 V I D = 16 A V GS = 10 V Min. Typ. 12 12 29 9 11 38 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbo l t d(of f) tf tr (Voff) tf tc Parameter Turn-off Delay T ime Fall T ime Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 125 V ID = 8 A V GS = 10 V R G = 4.7 (Resistive Load, see fig. 3) V CLAMP = 200 V I D = 16 A V GS = 10 V R G = 4.7 (Induct ive Load, see fig. 5) Min. Typ. 35 8 10 9 20 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 16 A V GS = 0 210 1.5 14 I SD = 16 A di/dt = 100 A/s T j = 150 o C V DD = 50 V (see test circuit, fig. 5) Test Con ditions Min. Typ. Max. 16 64 1.5 Unit A A V ns C A
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area
Safe Operating Area for TO-220
Safe Operating Area for TO-220FP
3/9
STP16NB25/FP
Thermal Impedance for TO-220 Thermal Impedance forTO-220FP
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
4/9
STP16NB25/FP
Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized Gate Threshold Voltage vs Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/9
STP16NB25/FP
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STP16NB25/FP
TO-220 MECHANICAL DATA
DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147
E
mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40
inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151
A
C
D1
L2 F1
D
G1
Dia. F2 F
L5 L7 L6
L9
L4
G
H2
P011C
7/9
STP16NB25/FP
TO-220FP MECHANICAL DATA
DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 O 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409
A
B
L3 L6 L7 F1 F
D
G1
E
H
F2
123 L2 L4
8/9
G
STP16NB25/FP
Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysi - Malta - Mexico - Morocco - The Netherlands a Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com .
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